The Resource Embedded Systems Specification and Design Languages : Selected Contributions from FDL’07, edited by Eugenio Villar, (electronic resource)

Embedded Systems Specification and Design Languages : Selected Contributions from FDL’07, edited by Eugenio Villar, (electronic resource)

Label
Embedded Systems Specification and Design Languages : Selected Contributions from FDL’07
Title
Embedded Systems Specification and Design Languages
Title remainder
Selected Contributions from FDL’07
Statement of responsibility
edited by Eugenio Villar
Contributor
Editor
Editor
Subject
Language
  • eng
  • eng
Summary
FDL is the most important European and, probably, worldwide forum to present research results, to exchange experiences, and to learn about new trends in the application of specification and design languages and the associated design and modeling methods and tools for complex, heterogeneous HW/SW embedded systems. FDL’07 was the tenth of a series of successful events held all around Europe. FDL’07 was held in Barcelona, the capital city of Catalonia, Spain. The high number of submissions to the conference this year allowed the Program Committee to prepare a high quality conference program. Embedded Systems Specification and Design Languages includes a selection of the most relevant contributions based on the review made by the program committee members and the quality of the contents of the presentation at the conference. In many cases, the authors have improved the original content with additional technical information. The papers cover the most important aspects in system modeling and specification, an essential area in Embedded Systems design. The objective of Embedded Systems Specification and Design Languages is to serve as a reference text for researchers and designers interested in the extension and improvement of the application of design and verification languages in the area of Embedded Systems
Member of
Is Subseries of
Dewey number
621.39/2
http://bibfra.me/vocab/relation/httpidlocgovvocabularyrelatorsedt
c7MVQif7uck
Language note
English
LC call number
TK7888.4
Literary form
non fiction
Nature of contents
dictionaries
http://library.link/vocab/relatedWorkOrContributorName
Villar, Eugenio.
Series statement
Lecture Notes in Electrical Engineering,
Series volume
10
http://library.link/vocab/subjectName
  • Systems engineering
  • Computer hardware
  • Software engineering
  • Circuits and Systems
  • Computer Hardware
  • Special Purpose and Application-Based Systems
  • Software Engineering/Programming and Operating Systems
Label
Embedded Systems Specification and Design Languages : Selected Contributions from FDL’07, edited by Eugenio Villar, (electronic resource)
Instantiates
Publication
Note
Description based upon print version of record
Carrier category
online resource
Carrier category code
  • cr
Content category
text
Content type code
  • txt
Contents
C/C++ Based System Design -- How Different Are Esterel and SystemC -- Timed Asynchronous Circuits Modeling and Validation Using SystemC -- On Construction of Cycle Approximate Bus TLMs -- Combinatorial Dependencies in Transaction Level Models -- An Integrated SystemC Debugging Environment -- Measuring the Quality of a SystemC Testbench by Using Code Coverage Techniques -- SystemC-Based Simulation of the MICAS Architecture -- Analog, Mixed-Signal, and Heterogeneous System Design -- Heterogeneous Specification with HetSC and SystemC-AMS: Widening the Support of MoCs in SystemC -- An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations -- Mixed-Level Modeling Using Configurable MOS Transistor Models -- UML-Based System Specification and Design -- Modeling AADL Data Communications with UML MARTE -- Software Real-Time Resource Modeling -- Model Transformations from a Data Parallel Formalism Towards Synchronous Languages -- UML and SystemC – A Comparison and Mapping Rules for Automatic Code Generation -- An Enhanced SystemC UML Profile for Modeling at Transaction-Level -- SC2 StateCharts to SystemC: Automatic Executable Models Generation -- Formalisms for Property-Driven Design -- Asynchronous On-Line Monitoring of Logical and Temporal Assertions -- Transactor-Based Formal Verification of Real-Time Embedded Systems -- A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set
Dimensions
unknown
Edition
1st ed. 2008.
Extent
1 online resource (281 p.)
Form of item
online
Isbn
9786611513023
Media category
computer
Media type code
  • c
Other control number
10.1007/978-1-4020-8297-9
Specific material designation
remote
System control number
  • (CKB)1000000000403608
  • (EBL)371744
  • (OCoLC)272298677
  • (SSID)ssj0000145686
  • (PQKBManifestationID)11152154
  • (PQKBTitleCode)TC0000145686
  • (PQKBWorkID)10181527
  • (PQKB)10128177
  • (DE-He213)978-1-4020-8297-9
  • (EXLCZ)991000000000403608
Label
Embedded Systems Specification and Design Languages : Selected Contributions from FDL’07, edited by Eugenio Villar, (electronic resource)
Publication
Note
Description based upon print version of record
Carrier category
online resource
Carrier category code
  • cr
Content category
text
Content type code
  • txt
Contents
C/C++ Based System Design -- How Different Are Esterel and SystemC -- Timed Asynchronous Circuits Modeling and Validation Using SystemC -- On Construction of Cycle Approximate Bus TLMs -- Combinatorial Dependencies in Transaction Level Models -- An Integrated SystemC Debugging Environment -- Measuring the Quality of a SystemC Testbench by Using Code Coverage Techniques -- SystemC-Based Simulation of the MICAS Architecture -- Analog, Mixed-Signal, and Heterogeneous System Design -- Heterogeneous Specification with HetSC and SystemC-AMS: Widening the Support of MoCs in SystemC -- An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations -- Mixed-Level Modeling Using Configurable MOS Transistor Models -- UML-Based System Specification and Design -- Modeling AADL Data Communications with UML MARTE -- Software Real-Time Resource Modeling -- Model Transformations from a Data Parallel Formalism Towards Synchronous Languages -- UML and SystemC – A Comparison and Mapping Rules for Automatic Code Generation -- An Enhanced SystemC UML Profile for Modeling at Transaction-Level -- SC2 StateCharts to SystemC: Automatic Executable Models Generation -- Formalisms for Property-Driven Design -- Asynchronous On-Line Monitoring of Logical and Temporal Assertions -- Transactor-Based Formal Verification of Real-Time Embedded Systems -- A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set
Dimensions
unknown
Edition
1st ed. 2008.
Extent
1 online resource (281 p.)
Form of item
online
Isbn
9786611513023
Media category
computer
Media type code
  • c
Other control number
10.1007/978-1-4020-8297-9
Specific material designation
remote
System control number
  • (CKB)1000000000403608
  • (EBL)371744
  • (OCoLC)272298677
  • (SSID)ssj0000145686
  • (PQKBManifestationID)11152154
  • (PQKBTitleCode)TC0000145686
  • (PQKBWorkID)10181527
  • (PQKB)10128177
  • (DE-He213)978-1-4020-8297-9
  • (EXLCZ)991000000000403608

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