The Resource Advanced ASIC Chip Synthesis : Using Synopsys® Design CompilerTM and PrimeTime®, by Himanshu Bhathagar, (electronic resource)

Advanced ASIC Chip Synthesis : Using Synopsys® Design CompilerTM and PrimeTime®, by Himanshu Bhathagar, (electronic resource)

Label
Advanced ASIC Chip Synthesis : Using Synopsys® Design CompilerTM and PrimeTime®
Title
Advanced ASIC Chip Synthesis
Title remainder
Using Synopsys® Design CompilerTM and PrimeTime®
Statement of responsibility
by Himanshu Bhathagar
Creator
Subject
Genre
Language
eng
Summary
Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® and PrimeTime® describes the advanced concepts and techniques used for ASIC chip synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail. The emphasis of this book is on real-time application of Synopsys tools used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, sub-micron ASIC designs. Significance is placed on HDL coding styles, synthesis and optimization, dynamic simulation, formal verification, DFT scan insertion, links to layout, and static timing analysis. At each step, problems related to each phase of the design flow are identified, with solutions and work-arounds described in detail. In addition, crucial issues related to layout, which includes clock tree synthesis and back-end integration (links to layout) are also discussed at length. Furthermore, the book contains in-depth discussions on the basics of Synopsys technology libraries and HDL coding styles, targeted towards optimal synthesis solutions. Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® and PrimeTime® is intended for anyone who is involved in the ASIC design methodology, starting from RTL synthesis to final tape-out. Target audiences for this book are practicing ASIC design engineers and graduate students undertaking advanced courses in ASIC chip design and DFT techniques. From the Foreword: `This book, written by Himanshu Bhatnagar, provides a comprehensive overview of the ASIC design flow targeted for VDSM technologies using the Synopsis suite of tools. It emphasizes the practical issues faced by the semiconductor design engineer in terms of synthesis and the integration of front-end and back-end tools. Traditional design methodologies are challenged and unique solutions are offered to help define the next generation of ASIC design flows. The author provides numerous practical examples derived from real-world situations that will prove valuable to practicing ASIC design engineers as well as to students of advanced VLSI courses in ASIC design'. Dr Dwight W. Decker, Chairman and CEO, Conexant Systems, Inc., (Formerly, Rockwell Semiconductor Systems), Newport Beach, CA, USA
Cataloging source
AU@
http://library.link/vocab/creatorName
Bhatnagar, Himanshu
Dewey number
621.3815
Index
no index present
LC call number
TK7888.4
Literary form
non fiction
Nature of contents
dictionaries
http://library.link/vocab/subjectName
  • Engineering
  • Computer-aided design
  • Computer engineering
  • Systems engineering
  • Computer-aided design
  • Computer engineering
  • Engineering
  • Systems engineering
Label
Advanced ASIC Chip Synthesis : Using Synopsys® Design CompilerTM and PrimeTime®, by Himanshu Bhathagar, (electronic resource)
Link
http://dx.doi.org/10.1007/978-1-4419-8668-9
Instantiates
Publication
Antecedent source
file reproduced from original
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
mixed
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Dimensions
unknown
Extent
1 online resource (xxv, 284 pages)
File format
unknown
Form of item
online
Isbn
9781441986689
Isbn Type
(electronic bk.)
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-1-4419-8668-9
Quality assurance targets
unknown
Reformatting quality
access
Sound
unknown sound
Specific material designation
remote
System control number
  • (OCoLC)853256873
  • (OCoLC)ocn853256873
Label
Advanced ASIC Chip Synthesis : Using Synopsys® Design CompilerTM and PrimeTime®, by Himanshu Bhathagar, (electronic resource)
Link
http://dx.doi.org/10.1007/978-1-4419-8668-9
Publication
Antecedent source
file reproduced from original
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
mixed
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Dimensions
unknown
Extent
1 online resource (xxv, 284 pages)
File format
unknown
Form of item
online
Isbn
9781441986689
Isbn Type
(electronic bk.)
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-1-4419-8668-9
Quality assurance targets
unknown
Reformatting quality
access
Sound
unknown sound
Specific material designation
remote
System control number
  • (OCoLC)853256873
  • (OCoLC)ocn853256873

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